The present invention relates to a phase accumulation type signal generator which accumulates an amount of phase to be added (hereinafter referred to as a phase add amount), for each clock, reads data out of a waveform memory using the added output, and converts the read output into an analog signal.
FIG. 1 is a block diagram of a conventional phase accumulation type signal generator. In a phase accumulator 11 a phase add amount n and the output k of a latch circuit 13 are added by an adder 12 and the added output n+k is latched in the latch circuit 13 for each clock, whereby the phase add amount n is accumulated. A signal of a frequency f, produced by an oscillator 14, is frequency divided by a variable frequency divider 15 down to 1/m to yield a clock, by which the latch circuit 13 is latched.
Data is read out of a waveform memory 16 using the output of the latch circuit 13, and the read output of the waveform memory 16 is latched by the clock in a latch circuit 17. The output of the latch circuit 17 is converted by a D-A converter 18 into an analog signal, which is applied to a low-pass filter 19, an amplifier 21 and an attenuator 22.
The phase accumulation type signal generator in FIG. 1 is capable of generating, with a simple arrangement, low-distortion signals of high frequency accuracy at low and even ultra-low frequencies. However, when the phase add amount n does not bear an integral multiple relationship to the maximum value of the adder 12 (that is, the address space of the memory 16), the amount of offset of the phase (hereinafter referred to as a phase offset amount) at the time a carry is generated, will vary. For example, as shown in FIG. 2A, the phase add amount n is accumulated for each clock, the output of the adder 12 increases as shown in FIG. 2B, and upon generation of the clock immediately after an overflow of the adder 12, a carry is yielded as a synchronization pulse as depicted in FIG. 2C. The phase offset amount .DELTA..phi. of this synchronization pulse fluctuates as shown in FIG. 2D, and consequently, such a synchronization pulse cannot be employed for triggering a synchronous detection or Fourier transformation for impedance measurement.
Impedance measurement calls for a sine-wave signal which is applied to a measuring object and a pulse signal which is accurately synchronized with the sine-wave signal. FIG. 3 shows a conventional method used to meet this requirement. The output of an oscillator 31 is frequency divided by a frequency divider 32, the output of which is filtered by a low-pass filter 33 to produce a sine-wave signal. The sine-wave signal is applied to a measuring object 34, the current output of which is converted by a current-voltage converter 35 into a voltage signal. The voltage signal is provided to a synchronous detector 36, wherein it is synchronously detected by the output of the frequency divider 32, and the synchronously detected output is integrated by an integrator 37.
In this instance, since the filter characteristic of the low-pass filter 33 is fixed, the number of frequencies used is limited to one or several and the frequency used cannot be changed.